The present invention relates to an analog-to-digital converter circuit arrangement and, more particularly, an analog-to-digital having control for calibration.
Analog-to-digital converters (A/D converters) serve to convert an analog input signal into a digital output signal. The analog input signal is time and amplitude continuous, while the digital output signal is time and amplitude discrete. Up until the present, A/D converters have been conceived as so-called xe2x80x9cstand alone systems.xe2x80x9d Any subsequent signal processing took place independently of the A/D converter.
A/D converters are designed in the form of highly integrated circuits. While digital structures can be easily reduced in size (xe2x80x9cshrunkxe2x80x9d), high integration makes reduction in the surface area of analog structures more and more difficult or even impossible. In addition, a reduction in the operating voltage is associated with increased high integration of the A/D converters. As a result of the increasing reduction in operating voltages, it becomes more and more difficult to ensure good analog quality.
According to an aspect of the disclosed apparatus, an analog-to-digital converter circuit arrangement is provided having an analog-to-digital converter configured to convert an analog input signal (x(t)) into a corresponding digital output signal (y(k)) during a normal operation. A control circuitry is included that is configured to calibrate the analog-to-digital converter during a calibration operation, wherein conversion of the analog input signal (x(t)) into the digital output signal (y(k)) during normal operation is interrupted for the calibration operation. Additionally, a digital interpolation unit is included and configured to obtain and emit a scanning value of the digital output signal (y(k)) corresponding to a momentary analog input signal (x(t)) by interpolating adjacent scanning values of the digital output signal (y(k)) adjacent to the scanning value during the calibration operation. A digital delay circuit is included and configured to compensate a group delay time of the digital interpolation unit and emit the digital output signal during normal operation of the analog-to-digital converter.